The Nintendo® Game Boy™, Part 2: The Game Boy’s CPU


Having looked at the foundations for the Game Boy’s hybrid CPU, let us see just what did and what didn’t make it from the Intel 8080 and the Zilog Z80 into the SHARP LR35902.

We will now point out the essential:

  1. One important aspect adopted from the Z80 and not mentioned in part 1 is conventional rather than technical: The syntax used to program the Sharp LR35902 follows the Z80 rather than the 8080.  This is fundamental to us as we’ll examine lots of programs written for the Game Boy (from the bootstrap ROM, to fragments of actual games).  We will come familiar with this syntax later on.
  2. Adoption of the special instruction extender (opcode 0xcb) from the Z80.
  3. Adoption of the bit manipulation instruction set from the Z80, accessed through the instruction extender.  This instructions were used to set, reset and test specific bits from registers or memory. Quite handy.
  4. It retained just the 8080’s register set; the registers added by the Z80 were left out.
  5. Clocked at 4MHz (4194304Hz).  This is faster that the 8080’s 2MHz and the Z80’s 2.5MHz.
  6. As noted in part 1, it retained a single address space; the I/O address space used by the 8080 and Z80 was discarded, so communication with I/O devices was done thorough this single address space.
  7. Because registers IY and IX are missing, there is no index+base memory addressing.
  8. Not all the flags or status bits from the 8080’s and Z80’s F register were adopted.  The following were used:
  • Bits 0 to 3 are not used.
  • Bit 4 represents the carry flag.  It is set when a carry from bit 7 is produced in arithmetical instructions.  Otherwise it is cleared.
  • Bit 5 represents the half-carry flag.  It is set when a carry from bit 3 is produced in arithmetical instructions.  Otherwise it is cleared.  It has a very common use, that is, for the DAA (decimal adjust) instruction.  Games used it extensively for displaying decimal values on the screen.
  • Bit 6 represents the subtract flag.  When the instruction is a subtraction this bit is set.  Otherwise (the instruction is an addition) it is cleared.
  • Bit 7 represents the zero flag.  It is set when the instruction results in a value of 0.  Otherwise (result different to 0) it is cleared.

For a detailed account of the Nintendo Game Boy CPU, refer to:

Continue with: The Nintendo Game Boy, Part 3: The Rest of the Hardware.


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2 thoughts on “The Nintendo® Game Boy™, Part 2: The Game Boy’s CPU

  1. Sinclair Spectrum used a 3.5MHz Z80A, the Amstrad CPC used a 4MHz Z80A, and some computers used 6MHz Z80Bs and even 8MHz Z80Hs back in the 80s – these were all the same chip design as the original 2.5MHz Z80.

    The choices Nintendo made for their CPU were all fairly sane for a game-oriented system that would be programmed in assembler.

    Index registers are most commonly used for functional programming languages like C to provide parameters to functions, but games would have been written with the values directly in the registers.

    The shadow registers were most commonly used for switching between the monitor/firmware and the userland code. Losing them wasn’t terrible, but they could have been useful in some situations for a game system where the game is also its own firmware (if you see what I mean).

    And yeah, IN/OUT aren’t needed on a non-expandable system that can sacrifice some address space.

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